tree: https://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git kbuild head: e73c4f947acbe6ff12d1f1711d6a8c0ad1c9483a commit: cc2b86bb90b2d045b82d45a6dbe7c9285e0f00b9 [2/4] kernel hacking: add a config option to disable compiler auto-inlining config: openrisc-allyesconfig (attached as .config) compiler: or1k-linux-gcc (GCC) 6.0.0 20160327 (experimental) reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout cc2b86bb90b2d045b82d45a6dbe7c9285e0f00b9 # save the attached .config to linux build tree make.cross ARCH=openrisc All errors (new ones prefixed by >>): In file included from arch/openrisc/mm/cache.c:17:0: arch/openrisc/mm/cache.c: In function 'cache_loop': arch/openrisc/include/asm/spr.h:20:27: warning: asm operand 0 probably doesn't match constraints #define mtspr(_spr, _val) __asm__ __volatile__ ( \ ^ arch/openrisc/mm/cache.c:29:3: note: in expansion of macro 'mtspr' mtspr(reg, line); ^~~~~ >> arch/openrisc/include/asm/spr.h:20:27: error: impossible constraint in 'asm' #define mtspr(_spr, _val) __asm__ __volatile__ ( \ ^ arch/openrisc/mm/cache.c:29:3: note: in expansion of macro 'mtspr' mtspr(reg, line); ^~~~~ vim +/asm +20 arch/openrisc/include/asm/spr.h 58e0166a4 Jonas Bonn 2011-06-04 19 58e0166a4 Jonas Bonn 2011-06-04 @20 #define mtspr(_spr, _val) __asm__ __volatile__ ( \ 58e0166a4 Jonas Bonn 2011-06-04 21 "l.mtspr r0,%1,%0" \ 58e0166a4 Jonas Bonn 2011-06-04 22 : : "K" (_spr), "r" (_val)) 58e0166a4 Jonas Bonn 2011-06-04 23 #define mtspr_off(_spr, _off, _val) __asm__ __volatile__ ( \ 58e0166a4 Jonas Bonn 2011-06-04 24 "l.mtspr %0,%1,%2" \ 58e0166a4 Jonas Bonn 2011-06-04 25 : : "r" (_off), "r" (_val), "K" (_spr)) 58e0166a4 Jonas Bonn 2011-06-04 26 :::::: The code at line 20 was first introduced by commit :::::: 58e0166a4772aaeb10c9b0f6d59f19099d2047df OpenRISC: Headers :::::: TO: Jonas Bonn <jonas@xxxxxxxxxxxx> :::::: CC: Jonas Bonn <jonas@xxxxxxxxxxxx> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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