Masahiro-san, I have a question about make *config. In scripts/kconfig/Makefile, there is following statement: $(obj)/zconf.tab.o: $(obj)/zconf.lex.c $(obj)/zconf.hash.c and the $(obj)/zconf.{tab,hash,lex}.c match the rule in Makefile.lib: $(obj)/%: $(src)/%_shipped $(call cmd,shipped) and cmd_shipped just transform the _shipped file to .c via `cat`. And zconf.tab.c includes several *other* .c files which make the whole process a little obscure, because there are not corresponding .o files for the *other* .c files. My questions is: Does this special handling has other meanings that I may miss? Or just legacy. Because a straightforward way in my mind would be: rename zconf.{tab,hash,lex}.c_shipped to zconf.{tab,hash,lex}.c, then has following in the Makefile common-objs := zconf.tab.o zconf.hash.o zconf.lex.o util.o etc... conf-objs := conf.o $(common-objs) -- Sincerely, Cao jin -- To unsubscribe from this list: send the line "unsubscribe linux-kbuild" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html