On Wed, Dec 09, 2015 at 08:25:08PM +0200, Tomi Valkeinen wrote:
> Hi,
>
> I wonder if this is as designed, or a bug:
>
> I have a makefile which has
>
> obj-$(CONFIG_FOO) += foo/
>
> In the foo directory, I have a makefile which has
>
> obj-$(CONFIG_FOO_BAR) += bar.o
>
> The values of the variables are
>
> CONFIG_FOO=m
> CONFIG_FOO_BAR=y
>
> When building the kernel with the above setup, I would expect make to
> enter the foo/ directory, and build 'bar.o' into the kernel image.
>
> And make does enter the directory, and does compile 'bar.o', but I think
> 'bar.o' doesn't end up anywhere. At least it's not compiled into the
> kernel image.
kbuild may enter a sub directory for two purposes:
1) to build object files to be part of the final image
Only subdirs specified using obj-y is visited.
2) to build object files that will be included in a module
Subdirs specified with obj-y and obj-m is visited
Since you have the following code in your Makefile:
obj-m += foo/
then foo/ is only visited to build modules.
So bar.o is built but is NOT included in the final image.
This is also the behaviour you see.
Sam
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