On Thu, Feb 21, 2013 at 9:22 PM, Jason Gunthorpe <jgunthorpe@xxxxxxxxxxxxxxxxxxxx> wrote: > On Thu, Feb 21, 2013 at 06:19:05PM -0600, Rob Herring wrote: > >> The desired FPGA use case is DT updates after booting the kernel. This >> has nothing to do with FIT images. And if the FPGA tools generate the >> DTB, then it is certainly not tied to the kernel. > > Completely unrelated, but do you have any pointer for how to do this? > Hot plugging a 'dtb fragment' into the kernel would be really handy.. This doesn't answer the full question on how FPGA tools generate DTB, but it is a huge problem for BeagleBone add-on hardware that we have some mechanism to dynamically load DT fragments. Pantelis posted some work in that direction[1] and has continued development of his patches and we've been using those extensively with BeagleBone kernel development[2]. It would be great if the FPGA folks would get on-board in supporting the dynamically loadable DT overlay fragments by reviewing and supporting upstream acceptance of the code. [1] http://lwn.net/Articles/531569/ [2] http://github.com/beagleboard/kernel/tree/3.8 > > I'm thinking something like adding a tree below a PCI controller > describing a PCI device and sub nodes, similar to what Thierry was > doing for his Avionics. How would interrupt maps and phandles be > managed across the main dtb and the 'hot plugged' dtb? > > Regards, > Jason > _______________________________________________ > U-Boot mailing list > U-Boot@xxxxxxxxxxxxx > http://lists.denx.de/mailman/listinfo/u-boot -- To unsubscribe from this list: send the line "unsubscribe linux-kbuild" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
