Quoting Jarkko Sakkinen (2019-08-09 13:31:04) > On Tue, 2019-08-06 at 15:07 -0700, Stephen Boyd wrote: > > From: Andrey Pronin <apronin@xxxxxxxxxxxx> > > > > Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50 > > firmware. The firmware running on the currently supported H1 > > Secure Microcontroller requires a special driver to handle its > > specifics: > > > > - need to ensure a certain delay between spi transactions, or else > > the chip may miss some part of the next transaction; > > - if there is no spi activity for some time, it may go to sleep, > > and needs to be waken up before sending further commands; > > - access to vendor-specific registers. > > Which Chromebook models have this chip? Pretty much all Chromebooks released in the last year or two have this chip in them. I don't have an exhaustive list, but you can usually check this by putting your device into dev mode and then looking at the driver attached to the TPM device in sysfs or by grepping the dmesg output for cr50. > > If I had an access to one, how do I do kernel testing with it i.e. > how do I get it to boot initramfs and bzImage from a USB stick? > > You can follow the developer guide[1] and build a USB image for the board you have. You can usually checkout the latest upstream kernel in place of where the kernel is built from in the chroot, typically ~/trunk/src/third_party/kernel/<version number>. The build should pick up that it's an upstream tree and try to use some default defconfig. This driver isn't upstream yet, so you may need to enable it in the defconfig, located in ~/trunk/src/third_party/chromiumos-overlay/eclass/cros-kernel/ so that the driver is actually built. After that, use 'cros flash' to flash the new kernel image to your USB stick and boot from USB with 'ctrl+u' and you should be on your way to chromeos kernel testing. [1] https://chromium.googlesource.com/chromiumos/docs/+/master/developer_guide.md