On Fri, May 03, 2024 at 09:40:43AM +0200, Linus Walleij wrote: > On Tue, Apr 23, 2024 at 3:46 PM Johan Hovold <johan+linaro@xxxxxxxxxx> wrote: > > > When the power supply is shared with other peripherals the reset line > > can be wired in such a way that it can remain deasserted regardless of > > whether the supply is on or not. > > > > This is important as it can be used to avoid holding the controller in > > reset for extended periods of time when it remains powered, something > > which can lead to increased power consumption. Leaving reset deasserted > > also avoids leaking current through the reset circuitry pull-up > > resistors. > > So the reset line in this case is a GPIO as seen from the context above. > > To me that means that the line should have the GPIO_OPEN_DRAIN flag > set in the device tree node for reset-gpios. As it has pull-up resistors, > setting the line to high impedance takes the device out of reset, and > thus it is effectively open drain. If you look at the devicetree patch later in the series this is exactly what is done. > > Add a new 'no-reset-on-power-off' devicetree property which can be used > > by the OS to determine when reset needs to be asserted on power down. > > If the above holds true, the driver can then just check for the open drain flag > in the reset-gpios phandle, and if that is set, conclude that it should not > actively drive the line low in the poweroff state. That is an alternative I considered but rejected as just knowing that the gpio is open-drain is not necessarily sufficient, for example, if the reset line is pulled to always-on rail while power to the device can be cut. Perhaps no one would ever construct hardware like that, but it does not seem like the hardware property I'm trying to encode necessarily follows from having an open-drain reset line. And then the OS should probably not make assumptions like that either, especially since getting it wrong can potentially lead to damaged hardware. Johan
