On Tue, 2017-08-22 at 14:37 +0300, Andy Shevchenko wrote: > On Tue, 2017-08-22 at 13:01 +0200, Takashi Iwai wrote: > > On Tue, 22 Aug 2017 12:25:12 +0200, > > Takashi Iwai wrote: > > > > Does it mean the register is big endian? > > > > > > Good point, I need to check the original code and the values. > > > > It's really big-endian, the order is hi:lo. > > > > But, admittedly, the temperature code hasn't been tested, and it's > > possibly missing something. So I'm fine to drop that part in the > > first version, too. > > I don't know if regmap allows you to define registers with different > sizes for same chip, perhaps it would make sense to start register > from > hi part (and not doing non-intuitive "- 1", or maybe "+ 1" instead) > and > mark it in comment that is BE16. I have just checked datasheet, so, there are 4 pairs of BE16 registers. VBAT (Hi:Lo) 0x54 DIETEMP 0x56 BPTHERM 0x58 GPADC 0x5a So, I would create a separate address mapping for them, dropping out that _LOW suffix and put a comment that they are BE16 since ADC has 10- bit resolution. Or even do a separate ADC driver under drivers/iio/adc for PMIC(s). -- Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> Intel Finland Oy -- To unsubscribe from this list: send the line "unsubscribe linux-input" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
