Re: [PATCH v2] Input: silead - Do not try to directly access the GPIO when using ACPI pm

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On Wed, 2017-03-08 at 19:01 +0200, Andy Shevchenko wrote:
> On Wed, 2017-03-08 at 13:46 +0200, Andy Shevchenko wrote:
> > On Wed, 2017-03-08 at 12:27 +0100, Hans de Goede wrote:
> > > On 08-03-17 11:30, Andy Shevchenko wrote:
> > > > On Wed, 2017-03-08 at 10:08 +0100, Hans de Goede wrote:
> > > > > On 07-03-17 14:55, Hans de Goede wrote:

> Below corrections to my initial view.
> 
> > Just really small pseudo ASL to consider:
> > 
> > _CRS:
> > 
> > GpioIo(...)  { pin #5 }
> > GpioIo(...)  { pin #3, pin #4, pin #2 }
> > GpioIo(...)  { pin #15 }
> > 
> > In Linux (for example) [index, connection ID]:
> > 
> > index 0  "reset"  (pin #2)
> > index 1  "func1"  (pin #4)
> > index 2  "func2"  (pin #3)
> 

> An this is completely reversed, should be
> 
> index 2  "reset"  (pin #2)
> index 1  "func1"  (pin #4)
> index 0  "func2"  (pin #3)

zOMG, since we have *different* connection IDs, they are all 0!!!

I'm really messing up the things in my brain :-(

> 
> > index 3  "enable" (pin #5)
> > index 4  "ready"  (pin #15)
> 
> Both above should have indexes 0 on Linux side!
> 
> > Mapping Linux <-> _CRS (either from _DSD or hard coded mapping
> > table):
> > 
> > index 0  pin #2    to 1,2
> > index 1  pin #4    to 1,1
> > index 2  pin #3    to 1,0
> > index 3  pin #5    to 0,0
> > index 4  pin #15   to 2,0
> 
> Ditto.

Ditto.

-- 8< -- 8< --

Alter scheme to see the different indexes on Linux side is

In Linux (for example) [index, connection ID]:

index 2  "reset"  (pin #2)
index 1  "reset"  (pin #4)
index 0  "reset"  (pin #3)

Mapping Linux <-> _CRS (either from _DSD or hard coded mapping table):

index 2  pin #2    to 1,2
index 1  pin #4    to 1,1
index 0  pin #3    to 1,0

-- 8< -- 8< --

> Sorry for my broken picture.

Sorry again.

-- 
Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Intel Finland Oy
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