Re: [PATCH v3] ad7877: keep dma rx buffers in seperate cache lines

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Tue, 11 May 2010 02:11:41 -0400 Mike Frysinger <vapier.adi@xxxxxxxxx> wrote:

> > __ __ __ __unsigned __ __ __ __ __ __ __ __pending:1; __ __ __/* P: lock */
> > +
> > + __ __ __ /*
> > + __ __ __ __* DMA (thus cache coherency maintenance) requires the
> > + __ __ __ __* transfer buffers to live in their own cache lines.
> > + __ __ __ __*/
> > + __ __ __ u16 conversion_data[AD7877_NR_SENSE] ____cacheline_aligned;
> > __};

(^^stupid gmail)

> i'm not sure this is correct.  the cached_aligned attribute makes sure
> it starts on a cache boundary, but it doesnt make sure it pads out to
> one.  so it might work more of the time, but i dont think it's
> guaranteed.

yup.  You'd need to put something like

	int pad ____cacheline_aligned;

_after_ the trashable field.

Then look at the .s file and make sure it came out right ;)
--
To unsubscribe from this list: send the line "unsubscribe linux-input" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[Index of Archives]     [Linux Media Devel]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [Linux Wireless Networking]     [Linux Omap]

  Powered by Linux