On Thu, January 29, 2009 3:13 am, Paul Mundt wrote: > On Wed, Jan 28, 2009 at 11:57:49PM +0000, Adrian McMenamin wrote: >> Rework the maple bus driver to support block reads and writes, while >> also cleaning up the code and aiming for a consistent namespace for >> functions. >> >> - mutex_init(&mq->mutex); >> + mq->recvbuf->buf = (void *)P2SEGADDR(&((mq->recvbuf->bufx)[0])); >> > Please do not abuse P2SEGADDR in this fashion. No new code should be > using P2SEGADDR anyways. maple is particularly abusive in this case since > it bounces back and forth between P2SEGADDR and PHYSADDR to try and > ignore the fact cache flushing has to be handled. > > You may also wish to consider ioremap/ioremap_nocache(). > Can I just use dma_cache_sync before each dma run and then use the P1 address space? -- To unsubscribe from this list: send the line "unsubscribe linux-input" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
