This patch is a part of effort to support meson a1 SoC and make meson saradc driver independent from vendor boot code initialization in common. Information was taken from vendor kernel 5.4, 4.19 and vendor uboot 2019. Most of the bits are undocumented at all or it's not said how they affect measuring. All those bits are already initialized in bl* code and since kernel driver dosn't rewrite or reset any registers but only changes some bits at init stage everything works fine. Test procedure is rather simple - one can change those bits in runtime (e.g. using devmem) and try to read channels (cat /sys/bus/platform/drivers/meson-saradc/.../iio:device0/*) changing some of those bits leads to measure procedure errors or abnormal results. Another test is build meson saradc as module, reset adc by reset bit, reload module and compare measure results to those got before reset. George Stark (3): iio: adc: meson: init channels 0,1 input muxes iio: adc: meson: init internal continuous ring counter iio: adc: meson: init voltage control bits drivers/iio/adc/meson_saradc.c | 73 ++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) -- 2.38.4
