On 10/09/2019 14.27, Lorenzo Bianconi wrote:
Could you please try to carry out the following test? 1- set the FIFO watermark to a high level (e.g. 128) $echo 256 > /sys/bus/iio/devices/iio:device{x}/buffer/length $echo 128 > /sys/bus/iio/devices/iio:device{x}/buffer/watermark 2- set a low acc odr (e.g 13Hz) $echo 13 > /sys/bus/iio/devices/iio:device{x}/sampling_frequency 3- start reading from the accel and generate a wake-upp event Is still happen? Are you able to decode bus transaction? (register addresses, data read, ..)
Do you still want this tested? [...]
Could you please try to enable the LIR (Latched interrupt - BIT(0) in 0x58)? Please remember that on ISM330DLC the interrupt will be automatically cleared reading the wake up src register after a time slice equals to 1/ODR so the it will be set for longer time if you run the device at low ODR
"iio: imu: st_lsm6dsx: enable LIR for sensor events" "iio: imu: st_lsm6dsx: enable clear on read for latched interrupts" Does allow us to get events and buffered reads simultaneously. I will drop PATCH 6/6. /Sean
