From: Martin Kelly <martin@xxxxxxxxxxxxxxxx>
The bmi160 bindings say that the BMI160 requires level-triggered,
active-low interrupts, but it actually supports all interrupt types, so fix
the note to reflect that.
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Martin Kelly <martin@xxxxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/iio/imu/bmi160.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/imu/bmi160.txt b/Documentation/devicetree/bindings/iio/imu/bmi160.txt
index 0c1c105fb503..1aec19997fb5 100644
--- a/Documentation/devicetree/bindings/iio/imu/bmi160.txt
+++ b/Documentation/devicetree/bindings/iio/imu/bmi160.txt
@@ -9,7 +9,7 @@ Required properties:
- spi-max-frequency : set maximum clock frequency (only for SPI)
Optional properties:
- - interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW
+ - interrupts : interrupt mapping for IRQ
- interrupt-names : set to "INT1" if INT1 pin should be used as interrupt
input, set to "INT2" if INT2 pin should be used instead
@@ -20,7 +20,7 @@ bmi160@68 {
reg = <0x68>;
interrupt-parent = <&gpio4>;
- interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <12 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
};
--
2.11.0
