...
> > > diff --git a/drivers/staging/iio/addac/adt7316.h b/drivers/staging/iio/addac/adt7316.h
> > > index fd7c5c92b599..2c72cf3f71cd 100644
> > > --- a/drivers/staging/iio/addac/adt7316.h
> > > +++ b/drivers/staging/iio/addac/adt7316.h
> > > @@ -11,16 +11,13 @@
> > >
> > > #include <linux/types.h>
> > > #include <linux/pm.h>
> > > +#include <linux/regmap.h>
> > >
> > > #define ADT7316_REG_MAX_ADDR 0x3F
> > >
> > > -struct adt7316_bus {
> > > - void *client;
> > > - int irq;
> > > - int (*read)(void *client, u8 reg, u8 *data);
> > > - int (*write)(void *client, u8 reg, u8 val);
> > > - int (*multi_read)(void *client, u8 first_reg, u8 count, u8 *data);
> > > - int (*multi_write)(void *client, u8 first_reg, u8 count, u8 *data);
> > > +static const struct regmap_config adt7316_regmap_config = {
> > > + .reg_bits = 8,
> > > + .val_bits = 10,
>
> I wonder if val_bits should be 8. The driver can read and write 8, 10,
> or 12 bit values. In the 10 and 12 bit cases, the driver currently
> (including with this patch) does two separate reads or writes and expects
> an 8 bit result from each. It then parses these two values to come up with
> the 10 or 12 bit value. I don't think the logic for this calculation is
> known to regmap, so with the current form of the patch, I think val_bits
> should be 8. Maybe there is a better way to do it though?
Good point. I would assume they should be 8 as well.
>
> I would have tested this but I couldn't get the patch to apply. Shreeya,
> I think if you rebase against iio/testing that might take care of it. I
> can then do some testing with v2.
>
Great.
Jonathan
> Jeremy
