Re: [Outreachy kernel] [PATCH] staging: iio: adc: Replace mlock with driver private lock

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On 14 March 2017 17:36:16 GMT+00:00, Gargi Sharma <gs051095@xxxxxxxxx> wrote:
>On Tue, Mar 14, 2017 at 2:24 AM, Lars-Peter Clausen <lars@xxxxxxxxxx>
>wrote:
>> On 03/13/2017 09:51 PM, Jonathan Cameron wrote:
>> [...]
>>>>> Gargi,
>>>>>
>>>>> Please insert the new lock above the __cacheline_aligned struct
>>>>> member.
>>>>
>>>> I will do that, but is there any reason why the lock should be
>above
>>>> ____cacheline_aligned struct member?
>>> Yes.  It's in fact very important that nothing comes after that.
>>>
>>> Will leave the why as an exercise for the reader.   I'll give the
>>> hit of spi drivers that do DMA...
>>
>>
>> One hint though, the answer is somewhere in Documentation/DMA-API.txt
>
>From what I have understood is that cacheline is used for keeping most
>frequently accessed values in adjacent cachelines. 

Why? What does cache line actually mean?

> We want the
>cacheline_aligned at the end in the struct definition so as to avoid
>any holes after the cacheline boundary.

Nope.  Try
http://www.pebblebay.com/a-guide-to-using-direct-memory-access-in-embedded-systems-part-two/

(Hint, search for 'shares')

>>
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