Hi Peter,
On 29 February 2016 at 20:42, Peter Meerwald-Stadler <pmeerw@xxxxxxxxxx> wrote:
>
>> Add base support for the 10-bit SAR ADC peripheral found
>> on NXP LPC18xx/43xx SoCs.
>
> nitpicking below
>
>> This is a minimal driver that does not support burst mode,
>> interrupts, DMA or hardware triggers.
>>
>> User manual with register description can be found on:
>> LPC18xx: www.nxp.com/documents/user_manual/UM10430.pdf
>> LPC43xx: www.nxp.com/documents/user_manual/UM10503.pdf
>>
>> Signed-off-by: Joachim Eastwood <manabian@xxxxxxxxx>
>> ---
>> +/* Data registers bits */
>
> 'Data register bits' maybe
>
>> + adc->vref = devm_regulator_get(&pdev->dev, "vref");
>> + if (IS_ERR(adc->vref)) {
>> + dev_err(&pdev->dev, "error get regulator\n");
>
> getting
>
>> + return PTR_ERR(adc->vref);
>> + }
>> +
>> + indio_dev->name = dev_name(&pdev->dev);
>> + indio_dev->dev.parent = &pdev->dev;
>> + indio_dev->info = &lpc18xx_adc_info;
>> + indio_dev->modes = INDIO_DIRECT_MODE;
>> + indio_dev->channels = lpc18xx_adc_iio_channels;
>> + indio_dev->num_channels = ARRAY_SIZE(lpc18xx_adc_iio_channels);
>> +
>> + ret = regulator_enable(adc->vref);
>> + if (ret) {
>> + dev_err(&pdev->dev, "unable to enable regulator\n");
>> + return ret;
>> + }
>> +
>> + ret = clk_prepare_enable(adc->clk);
>> + if (ret) {
>> + dev_err(&pdev->dev, "unable to enable clock.\n");
>
> maybe delete '.', it's the only message with a full stop
I will fix them all in the next version. I also noticed that a couple
of your comments also apply to the dac driver.
Thanks for looking through!
regards,
Joachim Eastwood
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