> -----Original Message-----
> From: Niklas Cassel <cassel@xxxxxxxxxx>
> Sent: 2024年7月24日 0:04
> To: Hongxing Zhu <hongxing.zhu@xxxxxxx>
> Cc: tj@xxxxxxxxxx; dlemoal@xxxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx;
> conor+dt@xxxxxxxxxx; shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx;
> festevam@xxxxxxxxx; linux-ide@xxxxxxxxxxxxxxx; stable@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx;
> kernel@xxxxxxxxxxxxxx
> Subject: Re: [PATCH v4 4/6] ata: ahci_imx: Add 32bits DMA limit for i.MX8QM
> AHCI SATA
>
> On Fri, Jul 19, 2024 at 01:42:14PM +0800, Richard Zhu wrote:
> > Since i.MX8QM AHCI SATA only has 32bits DMA capability.
> > Add 32bits DMA limit here.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
> > ---
> > drivers/ata/ahci_imx.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c index
> > 4dd98368f8562..e94c0fdea2260 100644
> > --- a/drivers/ata/ahci_imx.c
> > +++ b/drivers/ata/ahci_imx.c
> > @@ -827,6 +827,9 @@ static const struct scsi_host_template
> > ahci_platform_sht = {
> >
> > static int imx8_sata_probe(struct device *dev, struct imx_ahci_priv
> > *imxpriv) {
> > + if (!(dev->bus_dma_limit))
> > + dev->bus_dma_limit = DMA_BIT_MASK(32);
> > +
> > imxpriv->sata_phy = devm_phy_get(dev, "sata-phy");
> > if (IS_ERR(imxpriv->sata_phy))
> > return dev_err_probe(dev, PTR_ERR(imxpriv->sata_phy),
> > --
> > 2.37.1
> >
>
> Why is this needed?
>
> ahci_imx.c calls ahci_platform_init_host(), which calls
> dma_coerce_mask_and_coherent():
> https://github.co/
> m%2Ftorvalds%2Flinux%2Fblob%2Fv6.10%2Fdrivers%2Fata%2Flibahci_platfor
> m.c%23L750-L756&data=05%7C02%7Chongxing.zhu%40nxp.com%7C9d64eab
> e3c5f4af9d15808dcab312651%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0
> %7C0%7C638573474782493607%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC
> 4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7
> C%7C&sdata=4gHxszzym8hOgVIo6%2BM2JHMyBa5I5U65j08fH3P34BY%3D&re
> served=0
>
> Should this code perhaps look more like:
> https://github.co/
> m%2Ftorvalds%2Flinux%2Fblob%2Fv6.10%2Fdrivers%2Fata%2Fahci.c%23L104
> 8-L1054&data=05%7C02%7Chongxing.zhu%40nxp.com%7C9d64eabe3c5f4af9
> d15808dcab312651%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C
> 638573474782506903%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwM
> DAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sd
> ata=vpn1QyX8p7IZhBi5n2iOi8ezFRPTbGk1fqlK5ZsPhYk%3D&reserved=0
>
> where we set it to 64 or 32 bit explicitly.
>
> Does this solve your problem:
> diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
> index 581704e61f28..fc86e2c8c42b 100644
> --- a/drivers/ata/libahci_platform.c
> +++ b/drivers/ata/libahci_platform.c
> @@ -747,12 +747,11 @@ int ahci_platform_init_host(struct platform_device
> *pdev,
> ap->ops = &ata_dummy_port_ops;
> }
>
> - if (hpriv->cap & HOST_CAP_64) {
> - rc = dma_coerce_mask_and_coherent(dev,
> DMA_BIT_MASK(64));
> - if (rc) {
> - dev_err(dev, "Failed to enable 64-bit DMA.\n");
> - return rc;
> - }
> + rc = dma_coerce_mask_and_coherent(dev,
> + DMA_BIT_MASK((hpriv->cap & HOST_CAP_64) ? 64 :
> 32));
> + if (rc) {
> + dev_err(dev, "DMA enable failed\n");
> + return rc;
> }
>
> rc = ahci_reset_controller(host);
>
Hi Niklas:
I'm so sorry to reply late.
About the 32bit DMA limitation of i.MX8QM AHCI SATA.
It's seems that one "dma-ranges" property in the DT can let i.MX8QM SATA
works fine in my past days tests without this commit.
How about drop these driver changes, and add "dma-ranges" for i.MX8QM SATA?
Thanks a lot for your kindly help.
Best Regards
Richard Zhu
>
>
> Kind regards,
> Niklas
