Renesas SH7751 external interrupt encoder json-schema. Signed-off-by: Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx> --- .../renesas,sh7751-irl-ext.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml new file mode 100644 index 000000000000..ba4fe2e4d749 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 IRL external encoder with enable regs. + +maintainers: + - Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx> + +description: | + This is the generally used external interrupt encoder on SH7751 based boards. + +properties: + compatible: + items: + - const: renesas,sh7751-irl-ext + + reg: + minItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + '#address-cells': + const: 0 + + '#size-cells': + const: 0 + + renesas,width: + description: Enable register width + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 16, 32] + + renesas,set-to-disable: + $ref: /schemas/types.yaml#/definitions/flag + description: Setting this flag to 1 disables it. + + renesas,enable-bit: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + IRL enable register bit mapping + 1st word IRL + 2nd word bit index of enable register + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - renesas,width + - renesas,enable-bit + +additionalProperties: false + +examples: + - | + r2dintc: sh7751irl_encoder@a4000000 { + compatible = "renesas,sh7751-irl-ext"; + reg = <0xa4000000 0x02>; + interrupt-controller; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <1>; + renesas,width = <16>; + renesas,enable-bit = <0 11>, /* PCI INTD */ + <1 9>, /* CF IDE */ + <2 8>, /* CF CD */ + <3 12>, /* PCI INTC */ + <4 10>, /* SM501 */ + <5 6>, /* KEY */ + <6 5>, /* RTC ALARM */ + <7 4>, /* RTC T */ + <8 7>, /* SDCARD */ + <9 14>, /* PCI INTA */ + <10 13>, /* PCI INTB */ + <11 0>, /* EXT */ + <12 15>; /* TP */ + }; -- 2.39.2
