On 9/5/23 05:42, Niklas Cassel wrote: > From: Niklas Cassel <niklas.cassel@xxxxxxx> > > In AHCI 1.3.1, the register description for CAP.SSC: > "When cleared to ‘0’, software must not allow the HBA to initiate > transitions to the Slumber state via agressive link power management nor > the PxCMD.ICC field in each port, and the PxSCTL.IPM field in each port > must be programmed to disallow device initiated Slumber requests." > > In AHCI 1.3.1, the register description for CAP.PSC: > "When cleared to ‘0’, software must not allow the HBA to initiate > transitions to the Partial state via agressive link power management nor > the PxCMD.ICC field in each port, and the PxSCTL.IPM field in each port > must be programmed to disallow device initiated Partial requests." > > Ensure that we always set the corresponding bits in PxSCTL.IPM, such that > a device is not allowed to initiate transitions to power states which are > unsupported by the HBA. > > DevSleep is always initiated by the HBA, however, for completeness, set the > corresponding bit in PxSCTL.IPM such that agressive link power management > cannot transition to DevSleep if DevSleep is not supported. > > sata_link_scr_lpm() is used by libahci, ata_piix and libata-pmp. > However, only libahci has the ability to read the CAP/CAP2 register to see > if these features are supported. Therefore, in order to not introduce any > regressions on ata_piix or libata-pmp, create flags that indicate that the > respective feature is NOT supported. This way, the behavior for ata_piix > and libata-pmp should remain unchanged. > > This change is based on a patch originally submitted by Runa Guo-oc. > > Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxx> Applied to for-6.6-fixes. Thanks ! -- Damien Le Moal Western Digital Research
