On 8/28/23 20:55, Werner Fischer wrote: > Elkhart Lake is the successor of Apollo Lake and Gemini Lake. These > CPUs and their PCHs are used in mobile and embedded environments. > > With this patch I suggest that Elkhart Lake SATA controllers [1] should > use the default LPM policy for mobile chipsets. > The disadvantage of missing hot-plug support with this setting should > not be an issue, as those CPUs are used in embedded environments and > not in servers with hot-plug backplanes. > > We discovered that the Elkhart Lake SATA controllers have been missing > in ahci.c after a customer reported the throttling of his SATA SSD > after a short period of higher I/O. We determined the high temperature > of the SSD controller in idle mode as the root cause for that. > > Depending on the used SSD, we have seen up to 1.8 Watt lower system > idle power usage and up to 30°C lower SSD controller temperatures in > our tests, when we set med_power_with_dipm manually. I have provided a > table showing seven different SATA SSDs from ATP, Intel/Solidigm and > Samsung [2]. > > Intel lists a total of 3 SATA controller IDs (4B60, 4B62, 4B63) in [1] > for those mobile PCHs. > This commit just adds 0x4b63 as I do not have test systems with 0x4b60 > and 0x4b62 SATA controllers. Adding a mention about the other 2 IDs in a comment would be nice. > I have tested this patch with a system which uses 0x4b63 as SATA > controller. > > [1] https://sata-io.org/product/8803 > [2] https://www.thomas-krenn.com/en/wiki/SATA_Link_Power_Management#Example_LES_v4 > > Signed-off-by: Werner Fischer <devlists@xxxxxxxx> > Cc: stable@xxxxxxxxxxxxxxx > > --- a/drivers/ata/ahci.c 2023-07-27 11:45:21.141511943 +0200 > +++ b/drivers/ata/ahci.c 2023-07-27 11:44:57.054711402 +0200 > @@ -421,6 +421,7 @@ > { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */ > { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */ > { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */ > + { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */ > > /* JMicron 360/1/3/5/6, match class to avoid IDE function */ > { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, > -- Damien Le Moal Western Digital Research