On 10/31/22 20:43, Jiri Slaby (SUSE) wrote: > gcc13 now uses the type of the enum for all its members [1]. Given the > ata enum defines its members using both unsigned and signed ints, the > type of the enum is promoted to long. > > Make sure the rest of the members are unsigned ints using U suffix. > > The error in question is for example this: > drivers/block/mtip32xx/mtip32xx.c:722:25: error: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'long in' Same comment as for patch 1. Also please add a cover letter for multiple patches series. > > [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=36113 > > Cc: Martin Liska <mliska@xxxxxxx> > Cc: Damien Le Moal <damien.lemoal@xxxxxxxxxxxxxxxxxx> > Cc: linux-ide@xxxxxxxxxxxxxxx > Signed-off-by: Jiri Slaby (SUSE) <jirislaby@xxxxxxxxxx> > --- > drivers/ata/ahci.h | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h > index 94b5c81f08dd..14eb6e97f6f7 100644 > --- a/drivers/ata/ahci.h > +++ b/drivers/ata/ahci.h > @@ -39,7 +39,7 @@ > enum { > AHCI_MAX_PORTS = 32, > AHCI_MAX_SG = 168, /* hardware max is 64K */ > - AHCI_DMA_BOUNDARY = 0xffffffff, > + AHCI_DMA_BOUNDARY = ~0U, > AHCI_MAX_CMDS = 32, > AHCI_CMD_SZ = 32, > AHCI_CMD_SLOT_SZ = AHCI_MAX_CMDS * AHCI_CMD_SZ, > @@ -178,10 +178,10 @@ enum { > PORT_CMD_SPIN_UP = BIT(1), /* Spin up device */ > PORT_CMD_START = BIT(0), /* Enable port DMA engine */ > > - PORT_CMD_ICC_MASK = (0xf << 28), /* i/f ICC state mask */ > - PORT_CMD_ICC_ACTIVE = (0x1 << 28), /* Put i/f in active state */ > - PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */ > - PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */ > + PORT_CMD_ICC_MASK = (0xfU << 28), /* i/f ICC state mask */ > + PORT_CMD_ICC_ACTIVE = (0x1U << 28), /* Put i/f in active state */ > + PORT_CMD_ICC_PARTIAL = (0x2U << 28), /* Put i/f in partial state */ > + PORT_CMD_ICC_SLUMBER = (0x6U << 28), /* Put i/f in slumber state */ > > /* PORT_CMD capabilities mask */ > PORT_CMD_CAP = PORT_CMD_HPCP | PORT_CMD_MPSP | > @@ -191,14 +191,14 @@ enum { > PORT_FBS_DWE_OFFSET = 16, /* FBS device with error offset */ > PORT_FBS_ADO_OFFSET = 12, /* FBS active dev optimization offset */ > PORT_FBS_DEV_OFFSET = 8, /* FBS device to issue offset */ > - PORT_FBS_DEV_MASK = (0xf << PORT_FBS_DEV_OFFSET), /* FBS.DEV */ > + PORT_FBS_DEV_MASK = (0xfU << PORT_FBS_DEV_OFFSET), /* FBS.DEV */ > PORT_FBS_SDE = BIT(2), /* FBS single device error */ > PORT_FBS_DEC = BIT(1), /* FBS device error clear */ > PORT_FBS_EN = BIT(0), /* Enable FBS */ > > /* PORT_DEVSLP bits */ > PORT_DEVSLP_DM_OFFSET = 25, /* DITO multiplier offset */ > - PORT_DEVSLP_DM_MASK = (0xf << 25), /* DITO multiplier mask */ > + PORT_DEVSLP_DM_MASK = (0xfU << 25), /* DITO multiplier mask */ > PORT_DEVSLP_DITO_OFFSET = 15, /* DITO offset */ > PORT_DEVSLP_MDAT_OFFSET = 10, /* Minimum assertion time */ > PORT_DEVSLP_DETO_OFFSET = 2, /* DevSlp exit timeout */ -- Damien Le Moal Western Digital Research
