Re: libata and software reset

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On 10/19/22 18:42, John Garry wrote:
> On 19/10/2022 06:04, Damien Le Moal wrote:
>> On 10/19/22 14:03, Damien Le Moal wrote:
>>> On 10/18/22 22:24, John Garry wrote:
>>>> Hi guys,
>>>>
>>>> In the hisi_sas driver there are times in which we need to issue an ATA
>>>> software reset. For this we use hisi_sas_softreset_ata_disk() ->
>>>> sas_execute_ata_cmd() -> sas_execute_tmf(), which uses libsas "slow
>>>> task" mechanism to issue the command.
>>> Something is wrong here... The reset command sent by that function is
>>> for ATAPI (DEVICE RESET command). There is no device reset command for
>>> SATA disks following the ACS standard.
> 
> Yeah, that looks wrong.
> 
>>>
>>> So hisi_sas_softreset_ata_disk() seems totally bogus to me, unless you
>>> have a CD/DVD drive connected to the HBA:)
> 
> Sure
> 
>>>
>>> This is why the softreset function is a port operation defined by LLDs.
>>> How you reset the device depends on the adapter. E.g., for AHCI, you
>>> need to send a host2device FIS with the software reset bit set.
> 
> This would be quite a standard method, right?
> 
>> See: ahci_do_softreset() for AHCI.
> 
> For ahci_do_softreset(), do you just implicitly use ATA_CMD_NOP as the
> command?
> 
> For hisi_sas, maybe ATA_CMD_DEV_RESET is silently ignored when issued
> for a SATA disk, but having SRST set/unset still takes effect (and that
> is how it still works). I need to check on that.

Checked SATA-IO v3.5a. Software reset is explained in "11.4
Software reset protocol" and involves 2 things for the host to do:

DSR0: Software_reset_asserted, this state is entered if a Register Host
to Device FIS is received with the C bit in the FIS cleared to zero and
the SRST bit set to one in the Device Control register.
If in this state, the device begins its initialization and diagnostics
processing and awaits the clearing of the SRST bit.

DSR1: Execute_diagnostics, this state is entered if a Register Host to
Device FIS is received with the C bit in the FIS cleared to zero and the
SRST bit cleared to zero in the Device Control register.
If in this state, the device completes initialization and processing of
its diagnostics.

Which confirms what libahci is doing: essentially zeroing a tf with
ata_tf_init() and setting + resetting the SRST bit, sending the tf each
time.

-- 
Damien Le Moal
Western Digital Research




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