Sorry for spamming replies and quoting myself. On Wed, Aug 31, 2022 at 12:21 PM Peter Fröhlich <peter.hans.froehlich@xxxxxxxxx> wrote: > On Wed, Aug 31, 2022 at 9:48 AM Damien Le Moal > <damien.lemoal@xxxxxxxxxxxxxxxxxx> wrote: > > On 8/31/22 16:15, Hannes Reinecke wrote: > > > Oh, of course :-) > > > That was when doing SMR support for libata. > > > I dimly remember that some pre-spec drives had been using the DRDY bit > > > to signal an unaligned write. Which never made it into the spec, but the > > > decoding stayed. > > > > Any idea where the other bits come from ? Except for bit 5 (device fault), > > I do not see anything else in the specs that mandate these definitions... > > I have since discovered the "SCSI to ATA" specification which has two > tables about mapping ATA errors to SCSI errors. Among those I was able > to find an "unaligned write" case as well, but I cannot properly parse > the rest of the two tables yet. They are in sections 11.6 and 11.7 of > that document. So I've re-read everything I can get my hands on and from what I can tell the overall "flow" of ata_to_sense_error() is not what the specifications would imply. For example we look at BSY on entry and then say "ah, it's set, then let's ignore the error field" when the specification (the way I read it) instead says "BSY is transport dependent, so we say nothing about it here; but check the error bit in status, if it is set, interpret the error field, otherwise there's nothing for you in the error field". Of course I am a complete noob when it comes to this ATA/SATA/SCSI/AHCI stuff, so please divide by at least two. Sorry if this adds more confusion on top. Cheers, Peter
