Hi Serge, I love your patch! Yet something to improve: [auto build test ERROR on v5.17] [also build test ERROR on next-20220328] [cannot apply to axboe-block/for-next robh/for-next linus/master] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/intel-lab-lkp/linux/commits/Serge-Semin/ata-ahci-Add-DWC-Baikal-T1-AHCI-SATA-support/20220328-234809 base: f443e374ae131c168a065ea1748feac6b2e76613 config: arm-buildonly-randconfig-r005-20220327 (https://download.01.org/0day-ci/archive/20220329/202203290643.0ExdJphD-lkp@xxxxxxxxx/config) compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 0f6d9501cf49ce02937099350d08f20c4af86f3d) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm cross compiling tool for clang build # apt-get install binutils-arm-linux-gnueabi # https://github.com/intel-lab-lkp/linux/commit/28cf1dcfb31bfca35af403a8774d0d880923fab3 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Serge-Semin/ata-ahci-Add-DWC-Baikal-T1-AHCI-SATA-support/20220328-234809 git checkout 28cf1dcfb31bfca35af403a8774d0d880923fab3 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/ata/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All errors (new ones prefixed by >>): >> drivers/ata/ahci_dm816.c:72:6: error: invalid argument type 'struct clk_bulk_data' to unary expression if (!hpriv->clks[1]) { ^~~~~~~~~~~~~~~ >> drivers/ata/ahci_dm816.c:77:29: error: passing 'struct clk_bulk_data' to parameter of incompatible type 'struct clk *' refclk_rate = clk_get_rate(hpriv->clks[1]); ^~~~~~~~~~~~~~ include/linux/clk.h:584:40: note: passing argument to parameter 'clk' here unsigned long clk_get_rate(struct clk *clk); ^ 2 errors generated. vim +72 drivers/ata/ahci_dm816.c df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 60 df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 61 static int ahci_dm816_phy_init(struct ahci_host_priv *hpriv, struct device *dev) df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 62 { df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 63 unsigned long refclk_rate; df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 64 int mpy; df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 65 u32 val; df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 66 df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 67 /* df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 68 * We should have been supplied two clocks: the functional and df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 69 * keep-alive clock and the external reference clock. We need the df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 70 * rate of the latter to calculate the correct value of MPY bits. df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 71 */ df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 @72 if (!hpriv->clks[1]) { df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 73 dev_err(dev, "reference clock not supplied\n"); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 74 return -EINVAL; df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 75 } df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 76 df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 @77 refclk_rate = clk_get_rate(hpriv->clks[1]); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 78 if ((refclk_rate % 100) != 0) { df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 79 dev_err(dev, "reference clock rate must be divisible by 100\n"); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 80 return -EINVAL; df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 81 } df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 82 df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 83 mpy = ahci_dm816_get_mpy_bits(refclk_rate); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 84 if (mpy < 0) { df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 85 dev_err(dev, "can't calculate the MPY bits value\n"); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 86 return -EINVAL; df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 87 } df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 88 df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 89 /* Enable the PHY and configure the first HBA port. */ df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 90 val = AHCI_DM816_PHY_MPY(mpy) | AHCI_DM816_PHY_LOS(1) | df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 91 AHCI_DM816_PHY_RXCDR(4) | AHCI_DM816_PHY_RXEQ(1) | df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 92 AHCI_DM816_PHY_TXSWING(3) | AHCI_DM816_PHY_ENPLL(1); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 93 writel(val, hpriv->mmio + AHCI_DM816_P0PHYCR_REG); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 94 df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 95 /* Configure the second HBA port. */ df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 96 val = AHCI_DM816_PHY_LOS(1) | AHCI_DM816_PHY_RXCDR(4) | df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 97 AHCI_DM816_PHY_RXEQ(1) | AHCI_DM816_PHY_TXSWING(3); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 98 writel(val, hpriv->mmio + AHCI_DM816_P1PHYCR_REG); df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 99 df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 100 return 0; df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 101 } df46e6a4c06c89 Bartosz Golaszewski 2017-03-14 102 -- 0-DAY CI Kernel Test Service https://01.org/lkp
