Re: [PATCH] ata: pata_hpt37x: disable primary channel on HPT371

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On 2/20/22 02:44, Sergey Shtylyov wrote:
> HPT371 chips physically have only one channel, the secondary one, however
> the primary channel registers do exist!  Thus we have to manually disable
> the non-existing channel (if the BIOS hasn't done this already).  Alan Cox
> has only added such code to the 'pata_hpt3x2n' driver, forgetting about
> this one... :-/

No need to assign blame by name :) Something more neutral like:

"Similarly to the pata_hpt3x2n driver, always disable the primary channel."

will do. Also, do you have a fixes tag for this one ? Is it again:

Fixes: 669a5db411d8 ("[libata] Add a bunch of PATA drivers.")

?

> 
> Signed-off-by: Sergey Shtylyov <s.shtylyov@xxxxxx>
> 
> ---
> This patch is against the 'for-next' branch of Damien Le Moal's 'libata.git'
> repo.
> 
>  drivers/ata/pata_hpt37x.c |   14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> Index: libata/drivers/ata/pata_hpt37x.c
> ===================================================================
> --- libata.orig/drivers/ata/pata_hpt37x.c
> +++ libata/drivers/ata/pata_hpt37x.c
> @@ -867,6 +867,20 @@ static int hpt37x_init_one(struct pci_de
>  	pci_write_config_byte(dev, 0x5a, irqmask);
>  
>  	/*
> +	 * HPT371 chips physically have only one channel, the secondary one,
> +	 * but the primary channel registers do exist!  Go figure...
> +	 * So,  we manually disable the non-existing channel here
> +	 * (if the BIOS hasn't done this already).
> +	 */
> +	if (dev->device == PCI_DEVICE_ID_TTI_HPT371) {
> +		u8 mcr1;
> +
> +		pci_read_config_byte(dev, 0x50, &mcr1);
> +		mcr1 &= ~0x04;
> +		pci_write_config_byte(dev, 0x50, mcr1);
> +	}
> +
> +	/*
>  	 * default to pci clock. make sure MA15/16 are set to output
>  	 * to prevent drives having problems with 40-pin cables. Needed
>  	 * for some drives such as IBM-DTLA which will not enter ready


-- 
Damien Le Moal
Western Digital Research



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