On 1/11/22 17:09, Paul Menzel wrote:
>
> Dear Linux folks,
>
>
> Trying to decrease Linux’ overall boot time, tracing
> `sata_link_resume()` with ftrace, it calls `sata_link_debounce()` also
> in `drivers/ata/libata-sata.c`
>
> if ((rc = sata_link_debounce(link, params, deadline)))
> return rc;
>
> which runs a while loop, and takes the parameters defined in arrays at
> the top of the file.
>
> /* debounce timing parameters in msecs { interval, duration,
> timeout } */
> const unsigned long sata_deb_timing_normal[] = { 5,
> 100, 2000 };
> EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
> const unsigned long sata_deb_timing_hotplug[] = { 25,
> 500, 2000 };
> EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
> const unsigned long sata_deb_timing_long[] = { 100,
> 2000, 5000 };
> EXPORT_SYMBOL_GPL(sata_deb_timing_long);
>
> const unsigned long sata_deb_timing_normal[] = { 5, 100,
> 2000 };
>
> So the duration is set to 100 ms, which is quite a long time on current
> systems. At least on the Asus F2A85-M PRO that does not seem to be
> necessary. The motivation for adding these delays seems to be again
> broken controllers:
>
>> Make sure SStatus of @link reaches stable state, determined by
>> holding the same value where DET is not 1 for @duration polled every
>> @interval, before @timeout. Timeout constraints the beginning of the
>> stable state. Because DET gets stuck at 1 on some controllers after
>> hot unplugging, this functions waits until timeout then returns 0 if
>> DET is stable at 1.
>
> As I neither know the SATA standard nor the Linux code well, do you have
> a suggestion how to improve that on controllers not needing such a long
> delay? Make the duration value configurable on Linux’ command line?
AHCI and SATA-IO specs do define some requirements on register access
timing/wait-before-access time. Some of the timings are even indicated
in registers. Implementation for such requirements can be seen,
commented, in some places. E.g. sata_link_hardreset() has:
/* Couldn't find anything in SATA I/II specs, but AHCI-1.1
* 10.4.2 says at least 1 ms.
*/
ata_msleep(link->ap, 1);
Which I can confirm looking at AHCI 1.3.1 specs. Section 8.5.4 (exiting
from devsleep) also has mentions of timings using register values.
There are other wait/timing requirements for features such as staggered
spinup. Overall, there are a lot of things to consider here.
I am going through the specs (AHCI and SATA-IO) to gather all
requirements to check against the code. This will take some time given
the size of the specs and the different versions that need to be checked.
>
>
> Kind regards,
>
> Paul
--
Damien Le Moal
Western Digital Research
