Re: [PATCH v2 3/6] dt-bindings: ata: tegra: Convert binding documentation to YAML

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On 11/23/20 11:01 AM, Sowjanya Komatineni wrote:

On 11/20/20 12:17 PM, Rob Herring wrote:
On Fri, Nov 13, 2020 at 1:36 PM Sowjanya Komatineni
<skomatineni@xxxxxxxxxx> wrote:
This patch converts text based dt-binding document to YAML based
dt-binding document.

Signed-off-by: Sowjanya Komatineni <skomatineni@xxxxxxxxxx>
---
  .../devicetree/bindings/ata/nvidia,tegra-ahci.yaml | 137 +++++++++++++++++++++
  .../bindings/ata/nvidia,tegra124-ahci.txt          |  44 -------
  2 files changed, 137 insertions(+), 44 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml   delete mode 100644 Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt

diff --git a/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
new file mode 100644
index 0000000..dbbe460
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
@@ -0,0 +1,137 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Tegra AHCI SATA Controller
+
+maintainers:
+  - Thierry Reding <thierry.reding@xxxxxxxxx>
+  - Jonathan Hunter <jonathanh@xxxxxxxxxx>
+
+properties:
+  compatible:
+    enum:
+      - nvidia,tegra124-ahci
+      - nvidia,tegra132-ahci
+      - nvidia,tegra210-ahci
+
+  reg:
+    minItems: 2
+    maxItems: 3
+    items:
+      - description: AHCI registers
+      - description: SATA configuration and IPFS registers
+      - description: SATA AUX registers
+
+  interrupts:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: sata
+      - const: sata-oob
+
+  clocks:
+    maxItems: 2
+
+  reset-names:
+    items:
+      - const: sata
+      - const: sata-cold
+      - const: sata-oob
+
+  resets:
+    maxItems: 3
+
+  phy-names:
+    items:
+      - const: sata-0
+
+  phys:
+    maxItems: 1
+
+  hvdd-supply:
+    description: SATA HVDD regulator supply.
+
+  vddio-supply:
+    description: SATA VDDIO regulator supply.
+
+  avdd-supply:
+    description: SATA AVDD regulator supply.
+
+  target-5v-supply:
+    description: SATA 5V power regulator supply.
+
+  target-12v-supply:
+    description: SATA 12V power regulator supply.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clock-names
+  - clocks
+  - reset-names
+  - resets
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - nvidia,tegra124-ahci
+              - nvidia,tegra132-ahci
+    then:
+      properties:
+        reg:
+          maxItems: 2
+        reset-names:
+          minItems: 3
+        resets:
+          minItems: 3
+      required:
+        - phys
+        - phy-names
+        - hvdd-supply
+        - vddio-supply
+        - avdd-supply
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - nvidia,tegra210-ahci
+    then:
+      properties:
+        reg:
+          minItems: 3
+        reset-names:
+          minItems: 3
+        resets:
+          minItems: 3
+
+additionalProperties: true
+
+examples:
+  - |
+    #include <dt-bindings/clock/tegra210-car.h>
+    #include <dt-bindings/reset/tegra210-car.h>
+
+    sata@70020000 {
+            compatible = "nvidia,tegra210-ahci";
+            reg = <0x0 0x70027000 0x0 0x00002000>, /* AHCI */
+                  <0x0 0x70020000 0x0 0x00007000>, /* SATA */
+                  <0x0 0x70001100 0x0 0x00010000>; /* SATA AUX */
The default sizes are 1 cell for address and size, so this will give
you warnings. You either need to adjust the entries here or add a
parent node setting the sizes to 2 cells.

Thanks Rob.

tegra210.dtsi already has address and size set to 2 cells in parent node of sata.

Do you mean to add parent node and address and size cells set to 2 in this yaml example as well?


+            interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
The error is because you need the include files for these defines.
Will add header file for interrupts in yaml example.

+            clocks = <&tegra_car TEGRA210_CLK_SATA>,
+                     <&tegra_car TEGRA210_CLK_SATA_OOB>;
+            clock-names = "sata", "sata-oob";
+            resets = <&tegra_car 124>,
+                     <&tegra_car 129>,
+                     <&tegra_car 123>;
+            reset-names = "sata", "sata-cold", "sata-oob";
+    };

updated reg value with single address and single size along with interrupt header file.

dt_binding_check pass without errors. Will send v3.





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