Hans,
On 06/02/2020 13:50, Hans de Goede wrote:
Hi,
On 2/6/20 12:17 PM, Roger Quadros wrote:
On TI Platforms using LPAE, SATA breaks with 64-bit DMA.
Restrict it to 32-bit.
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Roger Quadros <rogerq@xxxxxx>
---
drivers/ata/ahci_platform.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 3aab2e3d57f3..b925dc54cfa5 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -62,6 +62,9 @@ static int ahci_probe(struct platform_device *pdev)
if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci"))
hpriv->flags |= AHCI_HFLAG_NO_FBS | AHCI_HFLAG_NO_NCQ;
+ if (of_device_is_compatible(dev->of_node, "snps,dwc-ahci"))
+ hpriv->flags |= AHCI_HFLAG_32BIT_ONLY;
+
The "snps,dwc-ahci" is a generic (non TI specific) compatible which
is e.g. also used on some exynos devices. So using that to key the
setting of the 32 bit flag seems wrong to me.
You are right, Vignesh also pointed this out to me offline.
snps,dwc-ahci does indeed support 64-bit addressing, so this patch is wrong.
IMHO it would be better to introduce a TI specific compatible
and use that to match on instead (and also adjust the dts files
accordingly).
The TI platform's TRM does say it has only 36-bits of the controller wired
in the device. If that was the case and DDR address never goes beyond
36-bits, we don't understand why it fails in the first place.
80000000-afcfffff : System RAM
b0000000-feffffff : System RAM
200000000-27fffffff : System RAM
cheers,
-roger
Regards,
Hans
port = acpi_device_get_match_data(dev);
if (!port)
port = &ahci_port_info;
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