Hi Miquel,
This patch adds clearing GHC.IS into hot path, could you explain how
irq storm is generated? thanks
According to AHCI Spec, HBA should not refer to GHC.IS to generate
MSI when applying multiple MSIs.
Best Regards,
Raymond
On Tue, May 21, 2019 at 2:31 PM Miquel Raynal <miquel.raynal@xxxxxxxxxxx> wrote:
>
> ahci_multi_irqs_intr_hard() is going to be used as interrupt handler
> to support SATA per-port interrupts. The current logic is to check and
> clear the SATA port interrupt status register only. To avoid spurious
> IRQs and interrupt storms, it will be needed to clear the port
> interrupt bit in the host interrupt status register as well.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
> ---
> drivers/ata/libahci.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
> index 692782dddc0f..9db6f488db59 100644
> --- a/drivers/ata/libahci.c
> +++ b/drivers/ata/libahci.c
> @@ -1912,7 +1912,10 @@ static void ahci_port_intr(struct ata_port *ap)
> static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
> {
> struct ata_port *ap = dev_instance;
> + struct ata_host *host = ap->host;
> + struct ahci_host_priv *hpriv = host->private_data;
> void __iomem *port_mmio = ahci_port_base(ap);
> + void __iomem *mmio = hpriv->mmio;
> u32 status;
>
> VPRINTK("ENTER\n");
> @@ -1924,6 +1927,8 @@ static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
> ahci_handle_port_interrupt(ap, port_mmio, status);
> spin_unlock(ap->lock);
>
> + writel(BIT(ap->port_no), mmio + HOST_IRQ_STAT);
> +
> VPRINTK("EXIT\n");
>
> return IRQ_HANDLED;
> --
> 2.19.1
>
