Hi, On Fri, May 10, 2019 at 09:25:50PM +0200, Uenal Mutlu wrote: > Increasing the SATA/AHCI DMA TX/RX FIFOs (P0DMACR.TXTS and .RXTS) from > default 0x0 each to 0x3 each gives a write performance boost of 120MB/s > from lame 36MB/s to 45MB/s previously. Read performance is about 200MB/s > [tested on SSD using dd bs=4K count=512K]. > > Tested on the Banana Pi R1 (aka Lamobo R1) and Banana Pi M1 SBCs > with Allwinner A20 32bit-SoCs (ARMv7-a / arm-linux-gnueabihf). > These devices are RaspberryPi-like small devices. > > RFC: Since more than about 25 similar SBC/SoC models do use the > ahci_sunxi driver, users are encouraged to test it on all the > affected boards and give feedback. > > List of the affected sunxi and other boards and SoCs with SATA using > the ahci_sunxi driver: > $ grep -i -e "^&ahci" arch/arm/boot/dts/sun*dts > and http://linux-sunxi.org/Category:Devices_with_SATA_port > > Signed-off-by: Uenal Mutlu <um@xxxxxxxxxxx> > --- > drivers/ata/ahci_sunxi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c > index 911710643305..257986431c79 100644 > --- a/drivers/ata/ahci_sunxi.c > +++ b/drivers/ata/ahci_sunxi.c > @@ -158,7 +158,7 @@ static void ahci_sunxi_start_engine(struct ata_port *ap) > struct ahci_host_priv *hpriv = ap->host->private_data; > > /* Setup DMA before DMA start */ > - sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ff00, 0x00004400); > + sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ffff, 0x00004433); Having comments / defines here would be great, once fixed: Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx> Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
