>-----Original Message----- >From: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx> >Sent: 2019年1月25日 15:46 >To: Peng Ma <peng.ma@xxxxxxx>; shawnguo@xxxxxxxxxx; axboe@xxxxxxxxx >Cc: robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx; Leo Li ><leoyang.li@xxxxxxx>; linux-ide@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; >linux-kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Andy Tang ><andy.tang@xxxxxxx> >Subject: Re: [v4] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list > >Hello! > >On 25.01.2019 6:32, Peng Ma wrote: > >> Add lxx2160a compatible to bindings documentation. > > lx2160a? > [Peng Ma] Yes, it is should be lx2160a, thanks very much. I will change it as soon as possible. Best Regards, Peng >> Signed-off-by: Peng Ma <peng.ma@xxxxxxx> >> --- >> changed for V4: >> - add lx2160a compatible to bindings doc >> >> .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 +- >> 1 files changed, 1 insertions(+), 1 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt >b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt >> index 7c3ca0e..9ecc019 100644 >> --- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt >> +++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt >> @@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller >> Required properties: >> - reg: Physical base address and size of the controller's register area. >> - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where >> - chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc. >> + chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a, lx2160a, etc. >> - clocks: Input clock specifier. Refer to common clock bindings. >> - interrupts: Interrupt specifier. Refer to interrupt binding. >> > >MBR, Sergei
