On 2015-12-22 01:07, Tejun Heo wrote:
Hello, Artem.
Can you please apply the following patch on top and see whether
anything changes? If it does make the issue go away, can you please
revert the ".can_queue" part and test again?
Thanks.
---
drivers/ata/ahci.h | 2 +-
drivers/ata/libahci.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -365,7 +365,7 @@ extern struct device_attribute *ahci_sde
*/
#define AHCI_SHT(drv_name) \
ATA_NCQ_SHT(drv_name), \
- .can_queue = AHCI_MAX_CMDS - 1, \
+ .can_queue = 1/*AHCI_MAX_CMDS - 1*/, \
.sg_tablesize = AHCI_MAX_SG, \
.dma_boundary = AHCI_DMA_BOUNDARY, \
.shost_attrs = ahci_shost_attrs, \
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -420,7 +420,7 @@ void ahci_save_initial_config(struct dev
hpriv->saved_cap2 = cap2 = 0;
/* some chips have errata preventing 64bit use */
- if ((cap & HOST_CAP_64) && (hpriv->flags & AHCI_HFLAG_32BIT_ONLY)) {
+ if ((cap & HOST_CAP_64)/* && (hpriv->flags &
AHCI_HFLAG_32BIT_ONLY)*/) {
dev_info(dev, "controller can't do 64bit DMA, forcing 32bit\n");
cap &= ~HOST_CAP_64;
}
This patch fixes the issue for me. Now rechecking without .can_queue
part.
BTW, since I left debugging on, here's the part you wanted:
[ 0.613851] XXX port 0 dma_sz=91392 mem=c0020000 mem_dma=00020000
cmd_slot=0 rx_fis=1024 cmd_tbl=1280
[ 0.613865] XXX port 1 dma_sz=91392 mem=eea00000 mem_dma=2ea00000
cmd_slot=0 rx_fis=1024 cmd_tbl=1280
[ 0.620464] XXX port 2 dma_sz=91392 mem=eea20000 mem_dma=2ea20000
cmd_slot=0 rx_fis=1024 cmd_tbl=1280
[ 0.627121] XXX port 3 dma_sz=91392 mem=eea40000 mem_dma=2ea40000
cmd_slot=0 rx_fis=1024 cmd_tbl=1280
[ 0.633791] XXX port 4 dma_sz=91392 mem=eea60000 mem_dma=2ea60000
cmd_slot=0 rx_fis=1024 cmd_tbl=1280
[ 0.640445] XXX port 5 dma_sz=91392 mem=eea80000 mem_dma=2ea80000
cmd_slot=0 rx_fis=1024 cmd_tbl=1280
--
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