Mon, 25 Aug 2014 20:48:17 +0100 от One Thousand Gnomes <gnomes@xxxxxxxxxxxxxxxxxxx>: > On Mon, 25 Aug 2014 15:34:54 -0400 > Tejun Heo <tj@xxxxxxxxxx> wrote: > > > Hello, > > > > On Sat, Aug 23, 2014 at 09:29:15PM +0400, Alexander Shiyan wrote: > > > > Shouldn't we distinguish them instead of forcing 16bit transfer on > > > > all? > > > > > > I do not see any reason to distinguish. This embodiment can be used with > > > 16-bit and 32-bit bus, and even for 64-bit ;) > > > > Hmmm... we do care about doing 32bit when possible as there are cases > > where PIO is the only data tarnsfer mode available > > Because some environments you get faster data transfers if you throw data > at the controller in 32bit chunks. In some cases that's because the > controller is clever about it and pipelining (eg some VLbus devices) in > others for the simple reason that the external bus cycles are either > 16bit or converted that way and the CPU executes a 32bit move followed by > an add faster than 16bit/add/16bit/add. > > (There are legacy memory mapped devices around where the fastest way > to read them on an older x86 is to use the FPU to do 64bit reads, but some > things should not be encouraged ;-) ) I did not understand a bit of the final solution... I hope I have clearly explained the original problem, which was written for this patch? This is not theory. --- ��.n��������+%������w��{.n�����{��'^�)��jg��������ݢj����G�������j:+v���w�m������w�������h�����٥