Marek Vasut <marek.vasut@xxxxxxxxx> writes: >> Once the transfer is over, you have to call dma_unmap_sg() to give back the >> memory (ie. ensure cache consistency once the peripheral has finished >> pushing data to the memory). > > This should be taken care of by the libata code, shouldn't it ? Now I checked, it is in ata_sg_setup(). >> >> are you able to detect bus error? >> > >> > Sadly, no. Nor can I detect any other condition. >> >> Wouldn't the DCSR_BUSERR bit of DCSR report a bus error ? > > I have doubts, check the PXA270 TRM for example for description of that bit. I have checked, and from my experience with PXA dma, when a DMA transfer is aborted (peripheral error or wrong descriptor setup), the DMA chain is stopped (thus your ENDIRQ never happens), and a DMA irq is raised, with DCSR having DCSR_BUSERR raised. This was at least verified for the DMA support in pxa_camera, and the previously DMA api submitted for pxa. Could you clarify your doubts, please ? Cheers. -- Robert -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
