Add remainder of workaround for errata SATA#13.
This prevents writes of certain adjacent 32-bit registers
from being combined into single 64-bit writes, which might
fail for the affected registers.
Most of sata_mv is already safe from this issue,
but adding this code to mv_write_cached_reg() will
catch the remaining cases and hopefully prevent future ones.
Signed-off-by: Mark Lord <mlord@xxxxxxxxx>
--- old/drivers/ata/sata_mv.c 2009-04-06 15:00:16.000000000 -0400
+++ new/drivers/ata/sata_mv.c 2009-04-06 15:04:05.000000000 -0400
@@ -919,8 +919,26 @@
static inline void mv_write_cached_reg(void __iomem *addr, u32 *old, u32 new)
{
if (new != *old) {
+ unsigned long laddr;
*old = new;
- writel(new, addr);
+ /*
+ * Workaround for 88SX60x1-B2 FEr SATA#13:
+ * Read-after-write is needed to prevent generating 64-bit
+ * write cycles on the PCI bus for SATA interface registers
+ * at offsets ending in 0x4 or 0xc.
+ *
+ * Looks like a lot of fuss, but it avoids an unnecessary
+ * +1 usec read-after-write delay for unaffected registers.
+ */
+ laddr = (long)addr & 0xffff;
+ if (laddr >= 0x300 && laddr <= 0x33c) {
+ laddr &= 0x000f;
+ if (laddr == 0x4 || laddr == 0xc) {
+ writelfl(new, addr); /* read after write */
+ return;
+ }
+ }
+ writel(new, addr); /* unaffected by the errata */
}
}
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