This patch supports VX855 and future chips whose IDE controller use 0x0571. Signed-off-by: Joseph Chan <josephchan@xxxxxxxxxx> --- a/include/linux/pci_ids.h 2009-01-09 23:28:18.000000000 +0800 +++ b/include/linux/pci_ids.h 2009-01-10 00:35:15.000000000 +0800 @@ -1370,6 +1370,7 @@ #define PCI_DEVICE_ID_VIA_82C598_1 0x8598 #define PCI_DEVICE_ID_VIA_838X_1 0xB188 #define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198 +#define PCI_DEVICE_ID_VIA_ANON 0xFFFF #define PCI_VENDOR_ID_SIEMENS 0x110A #define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 --- a/drivers/ata/pata_via.c 2008-12-25 07:26:37.000000000 +0800 +++ a/drivers/ata/pata_via.c 2009-01-16 02:36:58.000000000 +0800 @@ -97,6 +97,8 @@ u8 rev_max; u16 flags; } via_isa_bridges[] = { + { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, VIA_UDMA_133 | + VIA_BAD_AST }, { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, @@ -176,6 +178,16 @@ if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0) return ATA_CBL_SATA; + if (pdev->device == 0xC409) { + if (ap->port_no == 0) { + pci_read_config_dword(pdev, 0x52, &ata66); + return (ata66 & 0x10) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; + } else if (ap->port_no == 1) { + DPRINTK("C409 only has one pata channel\n"); + return ATA_CBL_PATA_UNK; + } + } + /* Early chips are 40 wire */ if ((config->flags & VIA_UDMA) < VIA_UDMA_66) return ATA_CBL_PATA40; @@ -483,10 +495,10 @@ } if (!config->id) { - printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n"); - return -ENODEV; - } - pci_dev_put(isa); + printk(KERN_WARNING "via: Unknown VIA SouthBridge.\n"); + config = via_isa_bridges; + } else + pci_dev_put(isa); if (!(config->flags & VIA_NO_ENABLES)) { /* 0x40 low bits indicate enabled channels */ @@ -587,6 +599,7 @@ { PCI_VDEVICE(VIA, 0x1571), }, { PCI_VDEVICE(VIA, 0x3164), }, { PCI_VDEVICE(VIA, 0x5324), }, + { PCI_VDEVICE(VIA, 0xC409), }, { }, }; ��.n��������+%������w��{.n�����{��'^�)��jg��������ݢj����G�������j:+v���w�m������w�������h�����٥