> +#ifdef AT91_GPIO_IRQ_HACK
> +#define NR_TRIES 10
> + int ntries = 0;
> + int pin_val1, pin_val2;
> + do {
> + pin_val1 = at91_get_gpio_value(AT91_PIN_PB20);
> + pin_val2 = at91_get_gpio_value(AT91_PIN_PB20);
> + } while (pin_val1 != pin_val2 && ntries++ < NR_TRIES);
You really don't want to put special board specific code in generic
locations. In the libata case you don't need to and I think in the ide
case you can avoid it too by wrapping the IRQ handler. Libata also
supports polled mode.
Now one other question - you use the 8/16bit set to flip between register
write sizes. Can you explain exactly what guarantees you don't take an
IRQ between setting the size and a write and having the IRQ handler or a
timer run in the middle, call other IDE routines and mess up because of
this.
I see nothing guaranteeing atomicity here and I suspect you either need
locks or (for single processor only) some carefully arranged scheme to
'stack' the 8/16bit select status.
Other comments:
- The old and new ATA layers both have timing tables and timing
functions so you don't need all the duplicated timing table logic.
--
To unsubscribe from this list: send the line "unsubscribe linux-ide" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
