Hello, I wrote:
irq handler) and ata_piix (this patch). Alan, how do other
controllers do it?
CMD chipsets do a register read .. from PCI config space (gak)
All BMDMA controllers I know about are sata_sil (already has private
The late chips do have the alternate interrupt latch bits in I/O
space (at BMIDE base + 3).
Just looked into th driver, so to be correct the MRDMODE register is
at BMIDE base + 1.
MBR, Sergei
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