Re: http://bugzilla.kernel.org/show_bug.cgi?id=11742

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Hello.

Borislav Petkov wrote:

For 'addr' we may try to use 4 bytes instead of the current 32 ones but lets
fix the regression first.
Alas, TX4939 requeires 8-byte DMA address (and byte count) alignment. Another semi-compatible SFF-8038 implementation...

... which calls for a field in the capabilities and mechanical status page
saying something like: hello, I'm a xy device and I can do z bytes dma
alignment, otherwise I get cranky and don't work anymore :)

I didn't get it -- TX4939 is IDE host controller and I can't imagine how an ATAPI device could care about the buffer address alignment on the host side...

MBR. Sergei


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