Bartlomiej Zolnierkiewicz wrote: > On Friday 12 September 2008, Atsushi Nemoto wrote: >> On Fri, 12 Sep 2008 19:34:06 +0400, Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx> wrote: > > [...] > >>>>>> + __ide_flush_dcache_range((unsigned long)addr, size); >>>>> Why is this needed BTW? >>>> Do you mean __ide_flush_dcache_range? This is needed to avoid cache >>>> inconsistency on PIO drive. PIO transfer only writes to cache but >>>> upper layers expects the data is in main memory. >>> Hum, then I wonder why it's MIPS specific... >> SPARC also have it. And there were some discussions for ARM IIRC. > > I was under the impression that it has been addressed by Tejun at > the higher-layer level (for both ide/libata) long time ago and that > MIPS/SPARC code are just a left-overs which could be removed now? cc'ing Jens and James. IIRC, I posted several patches but they never went in. I don't remember what the objections were or whether any alternative fix went in. Thanks. -- tejun -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
