> (1) Can you really ignore bit(2) (CORR) in the Status register offset 7 that > tells > you that the CF has detected and corrected a soft error?, etc. I guess it might be interesting to log the error rate but we don't currently do that. A corrected error is just that however - corrected by the card itself. > (2) An engineer at SanDisk Engineering told me NOT to do wear leveling. > The file allocation table is written very frequently back into the flash. So > is it really safe to assume that I don't need wear leveling??? Depends on your hardware vendor. Wear management is done within the CF card and only the hardware vendor can tell you what they do. > (3) Re. the BUSY bit in the status register (offset 7, bit D7), anybody > experienced > time outs? Yes - both from failing CF cards and also other random events (bad connections, people removing live cards etc) > (4) Re Error register (offset 1) bit D7 (BBK), again, I was told that it > cannot (???) > happen since the CF performs read-after-write and it automatically switches > good blocks > for bad ones... Is this correct? Depends on your hardware vendor. It certainly *can* occur with some CF cards perhaps when they run out of spare blocks. Alan -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
