Re: libata/sata_sil24 cache alignment problem?

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> Has anyone else reported a problem like this?  It requires
> non-coherent DMA, and a lack of a cache invalidate instruction, and
> one of the drivers that has this problem (it looks like sata_qstor
> does too, I haven't looked at others), so maybe that doesn't cover
> any other architectures.

Nobody has, not even PA-RISC which is normally guaranteed to make life
miserable in the caching area but I agree entirely with your diagnosis
and that buffer should indeed be marked cache aligned

> I can provide a patch if you're interested.

Please do.

Alan
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