Re: [PATCH 1/2] pata_hpt37x: actually clock HPT374 by 50 MHz DPLL

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On Tue, 07 Aug 2007 20:49:34 -0400
Jeff Garzik <jeff@xxxxxxxxxx> wrote:

> Alan Cox wrote:
> >>  		/* Compute DPLL */
> >> -		dpll = 2;
> >> -		if (port->udma_mask & 0xE0)
> >> -			dpll = 3;
> >> +		dpll = (port->udma_mask & 0xC0) ? 3 : 2;
> > 
> > Gak, I'd much rather people kept to the nice easy to read if() but fine
> > 
> > is_author_p()?Signed-off-by:Acked-by Alan Cox <alan@xxxxxxxxxx>
> 
> Does your ACK stand, even though it still locks up for Bob Ham?


Its a real fix for a real bug. The 374 needs a bit more stuff which is
sitting in my tree and I'll push for Sergei to comment tomorrow
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