Re: hpt374 sata (Highpoint Rocket 1540)

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Bartlomiej Zolnierkiewicz wrote:
On Wednesday 01 August 2007, Sergei Shtylyov wrote:

Does this patch change anything?

   Heh, did you *really* hope it will? :-D

Well, ugh, yes? :)

   Here we have some really nasty screw-up I'm afraid...

[PATCH] hpt366: always tune PIO

Index: b/drivers/ide/pci/hpt366.c
===================================================================
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1,5 +1,5 @@
/*
- * linux/drivers/ide/pci/hpt366.c		Version 1.10	Jun 29, 2007
+ * linux/drivers/ide/pci/hpt366.c		Version 1.11	Jul 29, 2007
 *
 * Copyright (C) 1999-2003		Andre Hedrick <andre@xxxxxxxxxxxxx>
 * Portions Copyright (C) 2001	        Sun Microsystems, Inc.
@@ -1265,10 +1265,10 @@ static void __devinit init_hwif_hpt366(i
	if (new_mcr != old_mcr)
		pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);

-	if (!hwif->dma_base) {
-		hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
+	hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
+
+	if (hwif->dma_base == 0)
		return;
-	}

	hwif->ultra_mask = hwif->cds->udma_mask;
	hwif->mwdma_mask = 0x07;

Concerning the patch (I lacked time to look at the driver to refresh my memory before -- was looking at the new Disk-on-chip H3 driver to be submitted for comments soon, BTW): it makes little sense in its current form since setting any DMA mode also sets 8-bit PIO timings now (and if DMA can't be set, the driver will fallback to PIO anyway)

Without ->autotune timings for PIO data transfers are never set and we need

The will get overwritten by DMA timings anyway. Although... you're right, with UltraDMA 16-bit PIO timings aren't going to be changed from the defaults.

to have a valid settings for some commands (IDENTIFY, SMART data) even if
DMA is not going to be used.  Thus why I was hoping that this patch might be
of some help.

   There's always default settings. ;-)

I have a patch that changes this behavior and switches to always auto-tuning PIO but I've changed my mind on how the DMA/PIO timing register sharing should be handled now -- however, since I was unable to come up with anything better all that time, I'll consider pushing out this version when I have a spare time...

Please do.

   In my copious free time. :-)

Thanks,
Bart

MBR, Sergei
-
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