Jeff Garzik wrote:
Tejun Heo wrote:
Hello, all.
This is the first take of powersave patchset. It implements runtime
link-level power management. To avoid confusion with regular
device/controller power management (suspend/resume), it's callsed
powersave. It primarily implements partial/slumber/phy-off power
states SATA standard specifies but if LLD has different way of
implementing link powersave, it's allowed to. Both host-initiated and
device-initiated operations are supported.
This patchset contains the following patches.
#01-07 : misc fixes/preps for powersave
#08-10 : implements core powersave infrastructure
#11-12 : implement powersave feature for ahci and sata_sil24
Powersave can be configured at boot time or while running by writing
to kernel module parameter /sys/module/libata/parameters/powersave.
The following powersave modes are supported.
* none : no powersave, link is powered up all the time
* HIPS : host-initiated powersave
* DIPS : device-initiated powersave
* static : no powersave on occupied link, power off empty link
* HIPS/static : HIPS on occupied link, power off empty link
* DIPS/static : DIPS on occupied link, power off empty link
For more information, please read head messages of individual patches.
All supported modes are tested on ICH7R AHCI, ICH6M AHCI, SiI3124,
SiI3132. Unfortunately SiI3112/4 family controllers don't support
HIPS and choke on DIPS and thus dropped from supported list.
Any chance you tried ata_piix static PS, using PCS register? :)
No, but I think both static and dynamic powersave can be implemented
nicely on ICH8s as SCRs can be accessed on those controllers without
mapping AHCI BAR. Hmm.. yeah, STATIC powersave mode can be done with
PCS although I'm pretty scared to mess with PCS at this point. :(
--
tejun
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