After installing a Promise SATA300 TX2 PLUS PCI card in a sparc64 (Ultra5) machine, the kernel complains about three unaligned accesses during boot: Kernel unaligned access at TPC[55c050] pdc_host_init+0x84/0xe8 Kernel unaligned access at TPC[55c074] pdc_host_init+0xa8/0xe8 Kernel unaligned access at TPC[55c094] pdc_host_init+0xc8/0xe8 Those unaligned accesses are the reads from and write to PDC_TBG_MODE in sata_promise.c:pdc_host_init(): /* reduce TBG clock to 133 Mhz. */ tmp = readl(mmio + PDC_TBG_MODE); tmp &= ~0x30000; /* clear bit 17, 16*/ tmp |= 0x10000; /* set bit 17:16 = 0:1 */ writel(tmp, mmio + PDC_TBG_MODE); readl(mmio + PDC_TBG_MODE); /* flush */ Looking into this I found two strange facts: - PDC_TBG_MODE is at offset 0x41, which clearly can never be 32-bit aligned. - The 4-byte range for PDC_TBG_MODE intersects both PDC_INT_SEQMASK and PDC_FLASH_CTL. Admittedly I know very little about PCI device programming, but this doesn't look right. /Mikael - : send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
