Jeff Garzik wrote: > > > Polling DMA support with nIEN=1 is theoretically invalid. You are not > supposed to touch the ATA shadow register set until after receiving an > irq event. > > On chipsets where nIEN=0 and the chip's IntrMask is also zero, its doable. > > I'm satisfied with simply never doing polling DMA, and change our mind > only if a critical need arises. > > Understand. After checking the code, polling DMA looks bad idea. Thanks for the advice. BTW, Tejun's proposal of pseudo periodic interrupts reminds me of some patches to integrate the polling pio with irq-pio. Will submit the patches for your review later. Albert - : send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
