[PATCH v3 7/8] smp: reword smp call IPI comment
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- Subject: [PATCH v3 7/8] smp: reword smp call IPI comment
- From: Valentin Schneider <vschneid@xxxxxxxxxx>
- Date: Fri, 2 Dec 2022 15:58:16 +0000
- Cc: "Paul E. McKenney" <paulmck@xxxxxxxxxx>, Steven Rostedt <rostedt@xxxxxxxxxxx>, Peter Zijlstra <peterz@xxxxxxxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx>, Juri Lelli <juri.lelli@xxxxxxxxxx>, Daniel Bristot de Oliveira <bristot@xxxxxxxxxx>, Marcelo Tosatti <mtosatti@xxxxxxxxxx>, Frederic Weisbecker <frederic@xxxxxxxxxx>, Ingo Molnar <mingo@xxxxxxxxxx>, Borislav Petkov <bp@xxxxxxxxx>, Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>, "H. Peter Anvin" <hpa@xxxxxxxxx>, Marc Zyngier <maz@xxxxxxxxxx>, Mark Rutland <mark.rutland@xxxxxxx>, Russell King <linux@xxxxxxxxxxxxxxx>, Nicholas Piggin <npiggin@xxxxxxxxx>, Guo Ren <guoren@xxxxxxxxxx>, "David S. Miller" <davem@xxxxxxxxxxxxx>
- In-reply-to: <20221202155817.2102944-1-vschneid@redhat.com>
- References: <20221202155817.2102944-1-vschneid@redhat.com>
Accessing the call_single_queue hasn't involved a spinlock since 2014:
6897fc22ea01 ("kernel: use lockless list for smp_call_function_single")
The llist operations (namely cmpxchg() and xchg()) provide similar ordering
guarantees, update the comment to lessen confusion.
Signed-off-by: Valentin Schneider <vschneid@xxxxxxxxxx>
---
kernel/smp.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/kernel/smp.c b/kernel/smp.c
index 93b4386cd3096..821b5986721ac 100644
--- a/kernel/smp.c
+++ b/kernel/smp.c
@@ -495,9 +495,10 @@ void __smp_call_single_queue(int cpu, struct llist_node *node)
#endif
/*
- * The list addition should be visible before sending the IPI
- * handler locks the list to pull the entry off it because of
- * normal cache coherency rules implied by spinlocks.
+ * The list addition should be visible to the target CPU when it pops
+ * the head of the list to pull the entry off it in the IPI handler
+ * because of normal cache coherency rules implied by the underlying
+ * llist ops.
*
* If IPIs can go out of order to the cache coherency protocol
* in an architecture, sufficient synchronisation should be added
--
2.31.1
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