RE: [PATCH v2 2/6] bitops: always define asm-generic non-atomic bitops
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- To: "'Luck, Tony'" <tony.luck@xxxxxxxxx>, "Lobakin, Alexandr" <alexandr.lobakin@xxxxxxxxx>, Marco Elver <elver@xxxxxxxxxx>
- Subject: RE: [PATCH v2 2/6] bitops: always define asm-generic non-atomic bitops
- From: David Laight <David.Laight@xxxxxxxxxx>
- Date: Mon, 13 Jun 2022 21:29:46 +0000
- Accept-language: en-GB, en-US
- Cc: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>, Arnd Bergmann <arnd@xxxxxxxx>, Yury Norov <yury.norov@xxxxxxxxx>, Mark Rutland <mark.rutland@xxxxxxx>, Matt Turner <mattst88@xxxxxxxxx>, Brian Cain <bcain@xxxxxxxxxxx>, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>, "Yoshinori Sato" <ysato@xxxxxxxxxxxxx>, Rich Felker <dalias@xxxxxxxx>, "David S. Miller" <davem@xxxxxxxxxxxxx>, Kees Cook <keescook@xxxxxxxxxxxx>, "Peter Zijlstra (Intel)" <peterz@xxxxxxxxxxxxx>, Borislav Petkov <bp@xxxxxxx>, "Greg Kroah-Hartman" <gregkh@xxxxxxxxxxxxxxxxxxx>, "linux-alpha@xxxxxxxxxxxxxxx" <linux-alpha@xxxxxxxxxxxxxxx>, "linux-hexagon@xxxxxxxxxxxxxxx" <linux-hexagon@xxxxxxxxxxxxxxx>, "linux-ia64@xxxxxxxxxxxxxxx" <linux-ia64@xxxxxxxxxxxxxxx>, "linux-m68k@xxxxxxxxxxxxxxxxxxxx" <linux-m68k@xxxxxxxxxxxxxxx>, "linux-sh@xxxxxxxxxxxxxxx" <linux-sh@xxxxxxxxxxxxxxx>, "sparclinux@xxxxxxxxxxxxxxx" <sparclinux@xxxxxxxxxxxxxxx>, "linux-arch@xxxxxxxxxxxxxxx" <linux-arch@xxxxxxxxxxxxxxx>, "linux-kernel@xxxxxxxxxxxxxxx" <linux-kernel@xxxxxxxxxxxxxxx>
- In-reply-to: <c82877aa7cc244f2bf0f65dfb2b617e7@intel.com>
- References: <20220610113427.908751-1-alexandr.lobakin@intel.com> <20220610113427.908751-3-alexandr.lobakin@intel.com> <YqNMO0ioGzJ1IkoA@smile.fi.intel.com> <22042c14bc6a437d9c6b235fbfa32c8a@intel.com> <CANpmjNNZAeMQjzNyXLeKY4cp_m-xJBU1vs7PgT+7_sJwxtEEAg@mail.gmail.com> <20220613141947.1176100-1-alexandr.lobakin@intel.com> <c82877aa7cc244f2bf0f65dfb2b617e7@intel.com>
From: Luck, Tony
> Sent: 13 June 2022 17:27
>
> >> It's listed in Documentation/atomic_bitops.txt.
> >
> > Oh, so my memory was actually correct that I saw it in the docs
> > somewhere.
> > WDYT, should I mention this here in the code (block comment) as well
> > that it's atomic and must not lose `volatile` as Andy suggested or
> > it's sufficient to have it in the docs (+ it's not underscored)?
>
> I think a comment that the "volatile" is required to prevent re-ordering
> is enough.
>
> But maybe others are sufficiently clear on the meaning? I once wasted
> time looking for the non-atomic __test_bit() version (to use in some code
> that was already protected by a spin lock, so didn't need the overhead
> of an "atomic" version) before realizing there wasn't a non-atomic one.
Does it make any sense for 'test bit' to be atomic?
I'm not even sure is needs any ordering constraints either.
The result is always stale - the value can be changed by
another cpu at any time.
The set/clear atomic bit-ops require a RMW bus cycle - which has
to be locked (or similar) to avoid corruption.
The atomic 'test and set' (etc) are RMW and return a valid state.
David
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