Re: [PATCH v3 0/7] Allow setting caching mode in arch_add_memory() for P2PDMA
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- To: Jason Gunthorpe <jgg@xxxxxxxx>
- Subject: Re: [PATCH v3 0/7] Allow setting caching mode in arch_add_memory() for P2PDMA
- From: Logan Gunthorpe <logang@xxxxxxxxxxxx>
- Date: Thu, 27 Feb 2020 10:54:40 -0700
- Cc: linux-kernel@xxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-ia64@xxxxxxxxxxxxxxx, linuxppc-dev@xxxxxxxxxxxxxxxx, linux-s390@xxxxxxxxxxxxxxx, linux-sh@xxxxxxxxxxxxxxx, platform-driver-x86@xxxxxxxxxxxxxxx, linux-mm@xxxxxxxxx, Dan Williams <dan.j.williams@xxxxxxxxx>, Michal Hocko <mhocko@xxxxxxxxxx>, David Hildenbrand <david@xxxxxxxxxx>, Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>, Christoph Hellwig <hch@xxxxxx>, Catalin Marinas <catalin.marinas@xxxxxxx>, Will Deacon <will@xxxxxxxxxx>, Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, Ingo Molnar <mingo@xxxxxxxxxx>, Borislav Petkov <bp@xxxxxxxxx>, Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>, Andy Lutomirski <luto@xxxxxxxxxx>, Peter Zijlstra <peterz@xxxxxxxxxxxxx>, Eric Badger <ebadger@xxxxxxxxxx>
- In-reply-to: <20200227174311.GL31668@ziepe.ca>
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On 2020-02-27 10:43 a.m., Jason Gunthorpe wrote:
> Hm, AFAIK WC memory is not compatible with the spinlocks/mutexs/etc in
> Linux, so while it is true the memory has no side effects, there would
> be surprising concurrency risks if anything in the kernel tried to
> write to it.
>
> Not compatible means the locks don't contain stores to WC memory the
> way you would expect. AFAIK on many CPUs extra barriers are required
> to keep WC stores ordered, the same way ARM already has extra barriers
> to keep UC stores ordered with locking..
>
> The spinlocks are defined to contain UC stores though.
>
> If there is no actual need today for WC I would suggest using UC as
> the default.
Ok, that sounds sensible. I'll do that in the next revision.
Thanks,
Logan
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